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january 2008 rev 1 1/24 24 STG6684 high isolation dual spdt analog switch features ultra high off-isolation: -80 db (typ) at 1 mhz ultra low power dissipation: i cc = 0.2 a (max.) at t a = 85 c r peak on t n = 1.30 max ( t a = 25 c) at v cc = 4.3 v r peak on s n = 0.55 max ( t a = 25 c) at v cc = 4.3 v wide operating voltage range: v cc (opr) = 1.65 to 4.3 v single supply 4.3 v tolerant and 1.8 v compatible threshold on digital control input at v cc = 1.65 to 4.3 v typical bandwidth (-3 db) at 65 mhz on sn channel, 58 mhz on the t n channel latch-up performance exceeds 100 ma per jesd 78, class ii esd performance exceeds jesd22 2000-v human body model (a114-a) description the STG6684 is a high-speed cmos low voltage dual analog spdt (single pole dual throw) switch or 2:1 multiplexer/de-multiplexer switch fabricated in silicon gate c 2 mos technology. the STG6684 is designed to operate from 1.65 to 4.3 v, making this device ideal for portable applications. the seln inputs are provided to control the switch operation. the switch sn is on (connected to common ports dn) when the seln input is held low and off (high impedance state exists between the two ports) when seln is held high. the switch tn is ?on? (connected to common port dn) when the seln input is held high and ?off? (high impedance state exists between the two ports) when seln is held low. additional key features are fast switching speed, break-before-make delay time and ultra low power consumption. all inputs and outputs are equipped with protection circuits against static discharge, giving them esd immunity and transient excess voltage. qfn10l (1.8 x 1.4 mm) table 1. device summary order code package packaging STG6684qtr qfn10l (1.8 x 1.4 mm) tape and reel www.st.com
table of contents STG6684 2/24 table of contents 1 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 3.1 recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 4 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 5 test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 6 application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
STG6684 pin settings 3/24 1 pin settings figure 1. pin connection (top through view) table 2. pin description pin number symbol name and function 1 s1 independent channel 2 t1 independent channel 3v cc positive supply voltage 4 sel2 selection control 5 d2 common channel 6 s2 independent channel 7 t2 independent channel 8 gnd ground (0 v) 9 sel1 selection control 10 d1 common channel 10 t1 v cc t2 9 s 2 s el2 d2 d1 s el1 gnd s 1 1 2 3 4 5 6 7 8
logic diagram STG6684 4/24 2 logic diagram figure 2. logic block diagram table 3. truth table seln switch sn switch tn l sn is connected to dn off (1) 1. high impedance hoff (1) tn is connected to dn s1 t1 s2 t2 d1 d2 se l2 se l1
STG6684 maximum rating 5/24 3 maximum rating stressing the device above the rating listed in the ?absolute maximum ratings? table may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit v cc supply voltage -0.5 to 5.5 v v i dc input voltage -0.5 to v cc + 0.5 v v ic dc control input voltage -0.5 to 5.5 v v o dc output voltage -0.5 to v cc + 0.5 v i ikc dc input diode current on control pin (v sel < 0 v) ? 50 ma i ik dc input diode current (v sel < 0 v) 50 ma i ok dc output diode current 20 ma i o dc output current 300 ma i op dc output current peak (pulse at 1 ms, 10% duty cycle) 500 ma i cc or i gnd dc v cc or ground current 100 ma p d power dissipation at t a =70 c (1) 1. derate above 70 c by 18.5 mw/c 1120 mw t stg storage temperature -65 to 150 c t l lead temperature (10 sec) 300 c
maximum rating STG6684 6/24 3.1 recommended operating conditions table 5. recommended operating conditions symbol parameter value unit v cc supply voltage 1.65 to 4.3 v v i input voltage 0 to v cc v v ic control input voltage 0 to 4.3 v v o output voltage 0 to v cc v t op operating temperature -40 to 85 c dt/dv input rise and fa ll time control input v cc = 1.65 v to 2.7 v 0 to 20 ns/v v cc = 3.0v to 4.3 v 0 to 10
STG6684 electrical characteristics 7/24 4 electrical characteristics table 6. dc specifications symbol parameter v cc (v) test condition value unit t a =25c -40 to 85 c min typ max min max v ih high level input voltage 1.65 ? 1.95 0.65 v cc 0.65 v cc v 2.3 ? 2.5 1.2 1.2 2.7 ? 3.0 1.3 1.3 3.3 ? 3.6 1.4 1.4 4.3 1.5 1.5 v il low level input voltage 1.65 ? 1.95 0.25 0.25 v 2.3 ? 2.5 0.25 0.25 2.7 ? 3.0 0.25 0.25 3.3 ? 3.6 0.30 0.30 4.3 0.40 0.40 r peak , tn switch t n on resistance 4.3 v s = 0 v to v cc i s = 100 ma 1.10 1.3 1.5 3.6 1.15 1.4 1.6 3.0 1.25 1.5 1.8 2.7 1.35 1.6 1.9 1.8 2.20 2.9 3.5 r peak, sn switch s n on resistance 4.3 v s = 0 v to v cc i s = 100 ma 0.45 0.55 0.62 3.6 0.48 0.58 0.65 3.0 0.51 0.62 0.70 2.7 0.54 0.70 0.80 1.8 0.84 1.10 1.30 r on, tn on resistance match between tn channels (1) 4.3 v s at r peak i s = 100 ma 10 m 3.6 14 3.0 14 2.7 15 1.8 30 r on, sn on resistance match between sn channels (1) 4.3 v s at r peak i s = 100 ma 7 m 3.6 7 3.0 8 2.7 9 1.8 12
electrical characteristics STG6684 8/24 r flat, tn on resistance flatness for tn channels (2) 4.3 v s = 0 to v cc i s = 100 ma 0.45 0.50 0.55 3.6 0.45 0.50 0.55 3.0 0.50 0.55 0.60 2.7 0.55 0.60 0.70 1.8 1.10 1.70 2.00 r flat, sn on resistance flatness for sn channels (2) 4.3 v s = 0 to v cc i s = 100 ma 0.15 0.20 0.20 3.6 0.15 0.20 0.20 3.0 0.15 0.20 0.20 2.7 0.15 0.20 0.20 1.8 0.35 0.55 0.66 i off off state leakage current (tn), (sn), (dn) 4.3 v s = 0.3 or 4 v 0.1 1 a i sel sel leakage current 0 ? 4.3 v sel = 0 to 4.3 v 0.05 1 a i cc quiescent supply current 1.65 ? 4.3 v sel =v cc or gnd 0.05 0.2 a i cclv quiescent supply current low voltage driving 4.3 v sel = 1.65 v 37 50 100 a v sel = 1.80 v 33 40 50 v sel = 2.60 v 12 20 30 1. r on =r on(max) -r on(min) . 2. flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specif ied analog signal ranges. table 6. dc specifications symbol parameter v cc (v) test condition value unit t a =25c -40 to 85 c min typ max min max
STG6684 electrical characteristics 9/24 table 7. ac electrical characteristics (c l =35pf, r l =50 , t r =t f 5ns) symbol parameter v cc (v) test condition value unit t a = 25 c -40 to 85 c min typ max min max t plh, t phl propagation delay 1.65 ? ? 1.95 0.45 ns 2.3 ? ? 2.7 0.45 3.0 ? ? 3.3 0.30 3.6 ? ? 4.3 0.30 t on tu r n - o n t i m e 1.65 ? ? 1.95 v s = 0.8 v 120 ns 2.3 ? ? 2.7 v s =1.5v 65 85 90 3.0 ? ? 3.3 42 55 65 3.6 ? ? 4.3 40 55 65 t off tu r n - o f f time 1.65 ? ? 1.95 v s =0.8v 45 ns 2.3 ? ? 2.7 v s =1.5v 18 30 40 3.0 ? ? 3.3 16 30 40 3.6 ? ? 4.3 15 30 40 t d break-before- make time delay 1.65 ? ? 1.95 c l = 35pf r l =50 v s =1.5v 218 ns 2.3 ? ? 2.7 210 3.0 ? ? 3.3 28 3.6 ? ? 4.3 26 q charge injection 1.65 ? ? 1.95 c l = 100pf r l =1m v gen =0v r gen =0 43 pc 2.3 ? ? 2.7 51 3.0 ? ? 3.3 51 3.6 ? ? 4.3 49
electrical characteristics STG6684 10/24 table 8. analog switch characteristics (c l =5pf, r l =50 , t a =25 c ) symbol parameter v cc (v) test condition value unit t a = 25 c -40 to 85 c min typ max min max oirr tn off isolation for switch t1,t2 1.65 ? ? 4.3 v s =1 v rms , f=1 mhz, r l = 50 -80 db v s =1 v rms , f=10mhz, r l = 50 -60 oirr sn off isolation for switch s1, s2 1.65 ? ? 4.3 v s =1 v rms , f=100khz rl = 50 -66 db v s =1 v rms , f=1mhz r l = 50 -45 xtalk sn crosstalk between s1 and s2 1.65 ? ? 4.3 v s =1 v rms , f=1mhz signal = 0 dbm -90 db v s =1 v rms , f=10mhz signal = 0 dbm -69 db xtalktn crosstalk between t1 and t2 1.65 ? ? 4.3 v s =1 v rms , f=1mhz signal = 0 dbm -85 db v s =1 v rms , f=10mhz signal = 0 dbm -74 thd sn to t a l harmonic distortion 2.3 ? ? 4.3 f = 20 hz to 20 khz r l =600 , c l = 50 pf v in =2v p-p v dc =v cc /2 0.01 % bw tn -3db bandwidth for switch t1, t2 1.65 ? ? 4.3 r l =50 signal = 0 dbm 58 mhz bw sn -3db bandwidth for switch s1,s2 1.65 ? ? 4.3 r l =50 signal = 0 dbm 65 mhz
STG6684 electrical characteristics 11/24 c sel control pin input capacitance v cc =0v 9 pf c on,tn tn port capacitance when the switch is enabled 3.3 f = 1 mhz 113 c on,sn sn port capacitance when the switch is enabled 3.3 f = 1 mhz 88 c off,tn tn port capacitance when the switch is disabled 3.3 f = 1 mhz 85 c off,sn sn port capacitance when the switch is disabled 3.3 f = 1 mhz 40 symbol parameter v cc (v) test condition value unit t a = 25 c -40 to 85 c min typ max min max
test circuit STG6684 12/24 5 test circuit figure 3. on resistance i ds v cs14071 v cc s1 s2 in gnd gnd d vs
STG6684 test circuit 13/24 figure 4. off leakage figure 5. off isolation v ss v cc in s 2 a c s 140 8 1 d v d a v cc gnd s (off) i d(off) i gnd in s 2 s 1 v cc v out 50 gnd v s cs00381
test circuit STG6684 14/24 figure 6. bandwidth figure 7. switch-to-switch crosstalk c s 00 3 71 v cc v cc s1 s2 in gnd d v out cs14091
STG6684 test circuit 15/24 1. c l = 5/35 pf or equivalent (inc ludes jig and pr obe capacitance) 2. r l =50 or equivalent 3. r t =z out of pulse generator (typically 50 ) figure 8. test circuit
test circuit STG6684 16/24 figure 9. break-before-make time delay figure 10. switching time and charge injection (v gen =0, r gen =0 , r l =1m , c l = 100 pf) figure 11. turn on, turn off delay time s1 s2 v cc d r l c l v out gnd v in in
STG6684 application diagram 17/24 6 application diagram figure 12. application diagram figure 13. application diagram bb class-d out p ut r l s1 t1 d1 s2 t2 d2 sel2 = hi g h sel1 = hi g h d1 s1 t1 bb class-d output r l d2 s2 t2 sel2 = hi g h sel1 = hi g h
package mechanical data STG6684 18/24 7 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 14. qfn10l (1.8 x 1.4 mm) package outline 7936408 rev.d
STG6684 package mechanical data 19/24 table 2. qfn10l(1.8 x 1.4 mm) mechanical data symbol millimeters min typ max a 0.45 0.50 0.55 a1 0 0.02 0.05 a3 0.127 b 0.15 0.20 0.25 d 1.75 1.80 1.85 e 1.35 1.40 1.45 e 0.40 l 0.35 0.40 0.45 figure 15. qfn10l (1.8 x 1.4 mm) footprint recommendations
package mechanical data STG6684 20/24 figure 16. qfn10l (1.8 x 1.4 mm) carrier tape
STG6684 package mechanical data 21/24 figure 17. qfn10l (1.8 x 1.4 mm) re el information - front side
package mechanical data STG6684 22/24 figure 18. qfn10l(1.8 x 1.4 mm) reel information - back view
STG6684 revision history 23/24 8 revision history table 9. document revision history date revision changes 9-jan-2008 1 initial release.
STG6684 24/24 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2008 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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